Accemic introduces hidICE as a next generation trace approach

•	Zero wait state real-time emulation
•	Unique debug solution for higher CPU clock rates
•	No reserved pins for trace port necessary
•	No bond-out-chips required
•	Access to complete trace information
•	No on-chip breakpoint support required
•	Unlimited support of complex breakpoint conditions
•	Debugging on difficult-to-access target hardware
•	Minimal chip core area for emulation control
•	One hidICE system supports different microcontroller families
•	Cost reduction and faster time-to-market